1. Field of the Invention
The present invention relates to a pattern formation method for use in fabrication process or the like for semiconductor devices, and more particularly relates to a pattern formation method using double patterning.
2. Description of the Prior Art
With increase in degree of integration of semiconductor devices and reduction in size of semiconductor devices, there have been increased demands for further rapid development of lithography techniques. Currently, pattern formation is performed by photolithography using, as a light source, a mercury lamp, KrF excimer laser, ArF excimer laser or the like. Furthermore, use of F2 laser with a further shorter wavelength was examined. However, there remain problems of exposure systems and resist materials and thus the development of lithography using F2 laser is discontinued.
Under such circumstances, in order to further reduce pattern size in light exposure using light with an exposure wavelength according to a known technique, a method called double patterning has been proposed (for example, see M. Maenhoudt, et al., “Double Patterning scheme for sub-0.25 kl single damascene structures at NA=0.75, λ=193 nm”, Proc. SPIE, vol. 5754, 1508 (2005)). This is a method in which a desired mask pattern is divided into two separate photomasks and exposure is performed using the two masks, thereby improving pattern contrast.
Resolution in lithography is defined as k1·λ/NA (k1: process constant, λ: exposure wavelength, NA: numerical aperture of exposure tool). In double patterning, the improvement of pattern contrast results in large reduction in a k1 value. Accordingly, even when light at the same exposure wavelength is used, the resolution can be largely improved.
Hereafter, a known pattern formation method using double patterning will be described with reference to FIGS. 8A through 8D, FIGS. 9A through 9D and FIGS. 10A and 10B.
First, as shown in FIG. 8A, a hard mask (for example, a silicon nitride film) 202 is formed on a semiconductor substrate 201 so as to have a thickness of about 0.12 μm.
Next, as shown in FIG. 8B, a first ArF resist film 203 is formed on the hard mask 202 so as to have a thickness of about 0.15 μm. Thereafter, first exposure is performed through a first photomask 204 using ArF excimer laser light 205 with NA of 0.85. After the first exposure, the first ArF resist film 203 is heated with a hot plate at a temperature of about 105° C. for about 60 seconds.
Next, as shown in FIG. 8C, the first ArF resist film 203 is developed using a 2.38 wt % tetramethylammonium hydroxide developer fluid, thereby forming a first resist pattern 203a. 
Next, as shown in FIG. 8D, using the first resist pattern 203a as a mask, etching is performed using fluorine-based gas or the like, thereby forming a first hard mask pattern 202a. 
Next, as shown in FIG. 9A, the first resist pattern 203a is removed by ashing using oxygen plasma and then, as shown in FIG. 9B, a second ArF resist film 206 is formed on the first hard mask pattern 202a so as to have a thickness of about 0.15 μm.
Next, as shown in FIG. 9C, second exposure is performed through a second photomask 207 using ArF excimer laser light 205 with NA of 0.85. After the second exposure, the second ArF resist film 206 is heated by a hot plate at a temperature of about 105° C. for about 60 seconds.
Next, as shown in FIG. 9D, the second ArF resist film 206 is developed using a 2.38 wt % tetramethylammonium hydroxide developer fluid, thereby forming a second resist pattern 206a. 
Next, as shown in FIG. 10A, using the second resist pattern 206a as a mask, the hard mask 202 is etched with fluorine-based gas or the like. Thereafter, as shown in FIG. 10B, the second resist pattern 206a is removed by ashing using oxygen plasma, thereby obtaining a second hard mask pattern 202b. 
Thus, the fine second hard mask pattern 202b can be obtained by two separate pattern exposures and two separate etchings using hard masks. For example, as shown in FIG. 11, by performing dry etching to the semiconductor substrate 201 (or etching target film (not shown) formed on the semiconductor substrate 201) using the second hard mask pattern 202b formed by double patterning, the semiconductor substrate 201 (or the etching target film) can be fine-processed.